MIT Libraries logoDome

MIT
View Item 
  • Dome Home
  • Project Whirlwind
  • Project Whirlwind Reports
  • View Item
  • Dome Home
  • Project Whirlwind
  • Project Whirlwind Reports
  • View Item
JavaScript is disabled for your browser. Some features of this site may not work without it.

Proposed Changes in FSQ-7 Memory

Shansky, David
Thumbnail
DownloadMC665_r13_M-2904.pdf (775.5Kb)
URI
http://hdl.handle.net/1721.3/40366
Date
1954-07-13
Abstract
A significant reduction of the cathode count coupled with an increase in operating speed of the FSQ-7 Memory banks can be achieved by a redesign of some of the sections of Memory. In order of increasing difficulty these are: the Digit Plan Drivers, the Sense Amplifiers, and the address selection system. Approximately 6 man-months of engineering time would be required to effect these changes.
Metadata
Show full item record

Collections
  • Project Whirlwind Reports

Browse

All of DomeCommunities & CollectionsBy Issue DateCreatorsTitlesSubjectsThis CollectionBy Issue DateCreatorsTitlesSubjects

My Account

Login
MIT Libraries
PrivacyPermissionsAccessibilityContact us
MIT
Content created by the MIT Libraries, CC BY-NC unless otherwise noted. Notify us about copyright concerns.