Now showing items 1-5 of 5

    • Proposed Changes in FSQ-7 Memory 

      Shansky, David (Lincoln Laboratory - Division 6, 1954-07-13)
      A significant reduction of the cathode count coupled with an increase in operating speed of the FSQ-7 Memory banks can be achieved by a redesign of some of the sections of Memory. In order of increasing difficulty these ...
    • Proposed Memory Address Selection System 

      Shansky, David (Lincoln Laboratory - Division 6, 1954-05-26)
      Increased memory in the use of cathodes is made possible by multi-level memory address selection and improved circuit designs.
    • X and Y Plane Drivers for WWII Memory 

      Shansky, David (MIT Digital Computer Laboratory, 1953-02-26)
      A number of different schemes are being considered as possible candidates for the circuitry to be employed in the X-Y plane current drivers in WWII. Briefly, they may be classified as to the type of selection mechanism ...
    • XD-I Digit-Plane Driver 

      Shansky, David (Lincoln Laboratory - Division 6, 1954-05-28)
      A self-balancing bridge is utilized in conjunction with an "and" and an "or" gate input to satisfy the wave form and gating specifications on the driver for a magnetic core memory digit plane winding.
    • Z-Plane Driver (WWII Memory Digit Plane) 

      Shansky, David (MIT Digital Computer Laboratory, 1953-03-27)
      Memorandum on planning for a memory address selection scheme, the Z-plane driver, and the Whirlwind II memory digit plane.