| dc.contributor.author | Project Whirlwind Research Staff | en_US |
| dc.date.accessioned | 2009-06-15T21:45:16Z | |
| dc.date.available | 2009-06-15T21:45:16Z | |
| dc.date.issued | 2009-06-15T21:45:16Z | |
| dc.identifier | MC665_r18_sr-2-v-12 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.3/40686 | |
| dc.description | Includes memos M-146, a thesis, and R-129. | en_US |
| dc.description | "There are three general types of input and output equipment required for Whirlwind I. They are: a) numerical, b) mechanical and electrical, and c) graphical" | en_US |
| dc.description | Includes block diagrams, figures, and photographs. | en_US |
| dc.description | November 1947 | en_US |
| dc.description.abstract | Part 2 of a compilation of Project Whirlwind memos regarding input and output. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | MIT Servomechanisms Laboratory | en_US |
| dc.relation.ispartofseries | MIT DIC 6345 | en_US |
| dc.relation.ispartofseries | Project Whirlwind Summary Report SR-2-v-12 | en_US |
| dc.relation.ispartofseries | Project Whirlwind Collection, MC665 | en_US |
| dc.subject.other | binary register | en_US |
| dc.subject.other | binary number code | en_US |
| dc.subject.other | decimal binary converter | en_US |
| dc.subject.other | flip-flop circuit | en_US |
| dc.subject.other | binary counter | en_US |
| dc.subject.other | gate peaker circuit | en_US |
| dc.subject.other | delay lines | en_US |
| dc.subject.other | delay stage schematic | en_US |
| dc.subject.other | chassis | en_US |
| dc.subject.other | waveforms | en_US |
| dc.subject.other | mechanical counter | en_US |
| dc.subject.other | cam phasing | en_US |
| dc.subject.other | double switch connections | en_US |
| dc.subject.other | cathode coupled oscillator | en_US |
| dc.subject.other | double switch connections | en_US |
| dc.title | Summary report no. 2, volume 12, input and output, part II | en_US |
| dc.type | Technical Report | en_US |
