| dc.contributor.author | Project Whirlwind Research Staff | en_US |
| dc.date.accessioned | 2009-06-15T21:24:18Z | |
| dc.date.available | 2009-06-15T21:24:18Z | |
| dc.date.issued | 1947-09-04 | en_US |
| dc.identifier | MC665_r17_sr-2-v-6.pdf | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.3/40674 | |
| dc.description | Includes list of drawings, diagrams, and figures. | en_US |
| dc.description.abstract | Part 2 of an in-depth review of Whirlwind I computer block diagrams. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | MIT Servomechanisms Laboratory | en_US |
| dc.relation.ispartofseries | MIT DIC 6345 | en_US |
| dc.relation.ispartofseries | Project Whirlwind Summary Report SR-2-v-6 | en_US |
| dc.relation.ispartofseries | Project Whirlwind Collection, MC665 | en_US |
| dc.subject.other | electronic switch | en_US |
| dc.subject.other | time pulse distributor | en_US |
| dc.subject.other | arithmetic element | en_US |
| dc.subject.other | accumulator | en_US |
| dc.subject.other | control functions | en_US |
| dc.subject.other | bus connections | en_US |
| dc.subject.other | master clock | en_US |
| dc.subject.other | operation matrix | en_US |
| dc.subject.other | storage chassis | en_US |
| dc.subject.other | flip-flop storage | en_US |
| dc.subject.other | A-register | en_US |
| dc.subject.other | B-register | en_US |
| dc.subject.other | parallel digit computer codes | en_US |
| dc.title | Summary report no. 2, volume 6, Whirlwind I computer block diagrams, volume 2 of 2 volumes | en_US |
| dc.type | Technical Report | en_US |
