| dc.contributor.author | Crane, J. D. | en_US |
| dc.contributor.author | Thompson, S. L. | en_US |
| dc.date.accessioned | 2009-06-15T19:36:24Z | |
| dc.date.available | 2009-06-15T19:36:24Z | |
| dc.date.issued | 1955-03-28 | en_US |
| dc.identifier | MC665_r15_M-3478 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.3/40536 | |
| dc.description | Includes: logical and physical state of the computer; reliability; margins and margin history; conclusions; and tables. | en_US |
| dc.description.abstract | Discussion of the results of the second in a series of evaluations performed on the XD-1 Central Computer. For this evaluation, log book data and daily operation reports which covered the period 7-18 March 1955 were studied to determine the reliability of the central computer and circuit margins. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Lincoln Laboratory - Division 6 | en_US |
| dc.relation.ispartofseries | Division 6 Memo M-3478 | en_US |
| dc.relation.ispartofseries | Project Whirlwind Collection, MC665 | en_US |
| dc.subject.other | core memory parities | en_US |
| dc.subject.other | resistor failures | en_US |
| dc.subject.other | card read-in failures | en_US |
| dc.subject.other | tube tapping | en_US |
| dc.subject.other | master clock crystal oscillator | en_US |
| dc.subject.other | reliability analysis | en_US |
| dc.subject.other | shock tests | en_US |
| dc.title | Results of the XD-1 central computer evaluation, 18 March 1955 | en_US |
| dc.type | Technical Report | en_US |
