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dc.contributor.authorBradspies, S.en_US
dc.date.accessioned2009-06-12T22:13:48Z
dc.date.available2009-06-12T22:13:48Z
dc.date.issued1954-10-21en_US
dc.identifierMC665_r13_6M-3107en_US
dc.identifier.urihttp://hdl.handle.net/1721.3/40349
dc.description.abstractA high-speed core driver has been developed. The circuit consists of two pulse amplifiers, a slave flip-flop, a buffer amplifier (which has very rapid rise and fall times), and a current amplifier (Fig. 1). The rise and fall times of the output current pulse are approximately 0.05 microsecond. The current pulse output is negative (as in the Mod V core driver) and its amplitude exceeds 1.5 amps (Fig. 8).en_US
dc.language.isoenen_US
dc.publisherLincoln Laboratory - Division 6en_US
dc.relation.ispartofseriesMIT DIC 6889en_US
dc.relation.ispartofseriesProject Whirlwind Memo 6M-3107en_US
dc.relation.ispartofseriesProject Whirlwind Collection, MC665en_US
dc.titleHigh Speed Core Driveren_US
dc.typeTechnical Reporten_US


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