Four Alternative Proposals for Accommodating the 64 x 64 Memory in MTC

Abstract

Four proposals are outlined for using a 64 x 64 = 2¹² -register memory in MTC, which was designed to have only 11 address bits. The first three involve very little extra equipment: I. Division of Memory into 32 x 32 quadrants elected by bank-switching instruction II. Operating as a 2048-word memory, with 2048 additional registers subject to limited access on only two or three instructions III. Use of a full 12-bit address by cutting instruction code to 16 The fourth, however, addition of a 17th digit to almost every register of the computer, is quite different from the standpoint of labor and equipment, being about a month's extra work for 4 or 5 people.