| dc.contributor.author | Guditz, E. A. | en_US |
| dc.date.accessioned | 2009-05-09T05:09:51Z | |
| dc.date.available | 2009-05-09T05:09:51Z | |
| dc.date.issued | 1953-06-10 | en_US |
| dc.identifier | MC665_r06_M-2225.pdf | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.3/39481 | |
| dc.description.abstract | Seventeen memory planes were built for MTC. Each has 1024 cores, 128 coordinate driving lines, a digit-plane winding, and a sensing winding. Four days were required to wire each plane with addition time for frame construction, inspection and testing. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | MIT Digital Computer Laboratory | en_US |
| dc.relation.ispartofseries | MIT DIC 6889 | en_US |
| dc.relation.ispartofseries | Project Whirlwind Memo M-2225 | en_US |
| dc.relation.ispartofseries | Project Whirlwind Collection, MC665 | en_US |
| dc.title | The Construction of Memory Planes for the MTC Memory | en_US |
| dc.type | Technical Report | en_US |
