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Memory Test Computer Marginal Checking System

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dc.contributor.author von Buelow, Robert en_US
dc.date.accessioned 2009-05-09T05:09:13Z
dc.date.available 2009-05-09T05:09:13Z
dc.date.issued 1953-05-08 en_US
dc.identifier MC665_r06_M-2136.pdf en_US
dc.identifier.uri http://hdl.handle.net/1721.3/39468
dc.description.abstract Marginal checking is performed in MTC by inserting an additional power supply in series with the line which is to be checked. This power supply is variable about zero, thus permitting either a positive or negative excursion of the net voltage on the tested line. The programs used at this time will not be discussed in this memorandum. en_US
dc.language.iso en en_US
dc.publisher MIT Digital Computer Laboratory en_US
dc.relation.ispartofseries MIT DIC 6889 en_US
dc.relation.ispartofseries Project Whirlwind Memo M-2136 en_US
dc.relation.ispartofseries Project Whirlwind Collection, MC665 en_US
dc.title Memory Test Computer Marginal Checking System en_US
dc.type Technical Report en_US


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